1. Field of the Invention
The present invention is directed to a sample rate converter for image data which is compact and low in cost and, more particularly, to a converter that directly converts a pixel stream to a different sample rate either higher or lower by filtering during which weights or filter coefficient are applied to pixels in the pixel stream using coefficient tables that are selected responsive to the desired conversion ratio.
2. Description of the Related Art
During the display of images produced by video compact discs such as produced by the Photo CD available from Eastman Kodak Co. the user occasionally desires to reduce the image displayed or magnify the image displayed for various reasons. The reduction and magnification can be performed by interpolating the pixel data. One method of interpolating the pixel image data, as illustrated in FIG. 1, is to perform sample rate conversion in the direction of an image line. The sample rate conversion is performed by oversampling a line of pixels H pixels in length by some integer factor N. Oversampling consists of inserting (N-1) additional pixels of value zero between every pixel in the input image line, resulting in a stream of NxH upsampled pixels. A convolutional filter is positioned at the beginning of the stream of upsampled pixels and used to sample the resulting stream of pixels to give a single output pixel. A convolutional filter generally consists of weighing values which are used in taking a weighted sum of the pixel stream, starting with the pixel which is under the first weighing value and continuing until there are no more weighing values. The convolutional filter is shifted forward in the stream of upsampled pixels by M pixels where M is the downsampling rate, and the next output pixel is then produced. The process is repeated until the filter no longer overlaps the upsampled pixel stream. The number of output pixels is then equal to N/M times the number of input pixels. An image results which has been scaled to the given dimension by a factor of N/M. One way to implement this method in hardware, as illustrated in FIG. 2, is to pass a stream of input data through a shift register 2 whose length is equal to the filter length, L. After each input pixel is shifted in, (N-1) zero values must be shifted in to accomplish the upsampling. Then, the output from each stage of the shift register 2 must pass through a corresponding one of a group 4 of multipliers to be multiplied by the corresponding filter weight from a corresponding one of a group of storages to storing the weights. The output of these multipliers is then added, via a cascade of adders 8, to produce and store an output pixel in a register 10 after every M shifts of upsampled data through the shift register. The zero stuffing and processing is controlled by a control unit 12. A filter of L taps needs L shift register stages, L multipliers and (L-1) adders. However, due to the precision required for intermediate results in this type of circuit and the long filter length commonly necessary for image data processing, this approach is impractical for an integrated circuit or for a low cost product because of the large amount of hardware needed.